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Using VMM, DPI, and TCL to Leverage Verification and Enable Early Testing, Emulation, and Validation
by Sami Patel, LSI

In addition to verification, some of the challenges an ASIC team faces are design integration and bring-up, in simulation, of emulation platforms and during silicon validation. In this article, Samir Patel of LSI discusses how his team used the SystemVerilog DPI to integrate a TCL script interpreter to serve as their VMM test layer. This enabled LSI’s designers to use the system-level verification environment to write directed tests to debug their designs.
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